This is a comparison of ARM instruction set architecture application processor cores designed by Arm Holdings (ARM Cortex-A) and 3rd parties. It does not include ARM Cortex-R, ARM Cortex-M, or legacy ARM cores.
This is a table comparing 32-bit central processing units that implement the ARMv7-A (A means Application) instruction set architecture and mandatory or optional extensions of it, the last AArch32.
This is a table of central processing units (CPUs) that implement the ARMv8-A instruction set architecture and mandatory or optional extensions of it. Almost all of these CPUs support the 64-bit AArch64 Execution State, and many of them support the 32-bit AArch32 Execution State for legacy applications. All chips of this type have a floating-point unit (FPU) that is better than the one in older ARMv7-A and NEON (SIMD) CPUs. Some of these CPUs have coprocessors also include cores from the older 32-bit architecture (ARMv7). Some of the CPUs are SoCs and can combine both ARM Cortex-A53 and ARM Cortex-A57, such as the Samsung Exynos 7 Octa.